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Sunnyvale, CA
Yayınlandı · 20.09.2026
Greenhouse (US)

# Senior RTL Design Engineer

Baidu USA

Responsibilities:&nbsp;&nbsp;
• Architect, design and implement new features, performance improvements, and ISA extensions in RISC-V CPU core generators.&nbsp;&nbsp;
• Microarchitecture development and specification. Ensure that knowledge is shared via great documentation and participation in a culture of collaborative design.&nbsp;&nbsp;
• Perform initial sandbox verification, and work with design verification team to create and execute thorough verification test plans.&nbsp;&nbsp;
• Work with physical implementation team to implement and optimize physical design to meet frequency, area, power goals.&nbsp;&nbsp;
• Collaborate with performance modelling team for performance exploration and optimization to meet performance goals.&nbsp; Requirements:&nbsp; &nbsp;
• 8+ yrs of recent industry experience in high-performance, energy-efficient CPU designs.&nbsp;&nbsp;
• Expertise in CPU processor designs in one or more of the following areas: instruction fetch and decode; branch prediction; register renaming and instruction scheduling; scalar and/or vector execution units; load-store unit; cache and memory subsystems.&nbsp;&nbsp;
• Knowledge of RISC-V architecture is a plus.&nbsp;&nbsp;
• Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL.&nbsp;&nbsp;
• Experience with Scala and/or Chisel is a plus.&nbsp;&nbsp;
• Attention to detail and a focus on high-quality design.&nbsp;&nbsp;
• Ability to work well with others and a belief that engineering is a team sport.&nbsp;&nbsp;
• Knowledge of at least one object-oriented and/or functional programming language.&nbsp;&nbsp;
• Background of successful CPU development from architecture through tapeout. &nbsp;
• MS/ PhD degree in EE, CE, CS or a related technical discipline, or equivalent experience. #LI-DNI

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